Cheng, Wu-tung: search on Z-Library

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1

[IEEE 2006 IEEE International Test Conference - Santa Clara, CA, USA (2006.10.22-2006.10.27)] 2006 IEEE International Test Conference - Signature Based Diagnosis for Logic BIST

Cheng, Wu-tung, Sharma, Manish, Rinderknecht, Thomas, Lai, Liyang, Hill, Chris

Year:

2006

Language:

english

File:

PDF, 235 KB

english, 2006

2

[IEEE 2017 22nd IEEE European Test Symposium (ETS) - Limassol, Cyprus (2017.5.22-2017.5.26)] 2017 22nd IEEE European Test Symposium (ETS) - Volume diagnosis data mining

Cheng, Wu-Tung, Yue Tian,, Reddy, Sudhakar M.

Year:

2017

Language:

english

File:

PDF, 823 KB

english, 2017

3

[IEEE 22nd IEEE VLSI Test Symposium, 2004. - Napa Valley, CA, USA (25-29 April 2004)] 22nd IEEE VLSI Test Symposium, 2004. Proceedings. - Logic BIST using constrained scan cells

Liyang Lai,, Rinderknecht, T., Wu-Tung Cheng,, Patel, J.H.

Year:

2004

Language:

english

File:

PDF, 1.47 MB

english, 2004

4

A Minimum Test Set for Multiple Fault Detection in Ripple Carry Adders

Wu-Tung Cheng, Patel, J.H.

Journal:

IEEE Transactions on Computers

Year:

1987

Language:

english

File:

PDF, 1.18 MB

english, 1987

5

[ACM Press the 49th Annual Design Automation Conference - San Francisco, California (2012.06.03-2012.06.07)] Proceedings of the 49th Annual Design Automation Conference on - DAC '12 - Small delay testing for TSVs in 3-D ICs

Huang, Shi-Yu, Lin, Yu-Hsiang, Tsai, Kun-Han (Hans), Cheng, Wu-Tung, Sunter, Stephen, Chou, Yung-Fa, Kwai, Ding-Ming

Year:

2012

Language:

english

File:

PDF, 1021 KB

english, 2012

6

Parametric Delay Test of Post-Bond Through-Silicon Vias in 3-D ICs via Variable Output Thresholding Analysis

Yu-Hsiang Lin,, Shi-Yu Huang,, Kun-Han Tsai,, Wu-Tung Cheng,, Sunter, S., Yung-Fa Chou,, Ding-Ming Kwai,

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2013

Language:

english

File:

PDF, 1.21 MB

english, 2013

7

[IEEE 2015 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2015.4.27-2015.4.29)] VLSI Design, Automation and Test(VLSI-DAT) - A test-application-count based learning technique for test time reduction

Lin, Guo-Yu, Tsai, Kun-Han, Huang, Jiun-Lang, Cheng, Wu-Tung

Year:

2015

Language:

english

File:

PDF, 635 KB

english, 2015

8

Circuit and Methodology for Testing Small Delay Faults in the Clock Network

Yang, Shao-Fu, Wen, Zhi-Yuan, Huang, Shi-Yu, Tsai, Kun-Han, Cheng, Wu-Tung

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2018

Language:

english

File:

PDF, 689 KB

english, 2018

9

Scan Integrity Tests for EDT Compression

Cheng, Wu-Tung, Rajski, Grzegorz Mrugalski Janusz, Trawka, Maciej, Tyszer, Jerzy

Journal:

IEEE Design and Test

Year:

2020

Language:

english

File:

PDF, 4.41 MB

english, 2020

10

[IEEE 2020 IEEE International Test Conference in Asia (ITC-Asia) - Taipei, Taiwan (2020.9.23-2020.9.25)] 2020 IEEE International Test Conference in Asia (ITC-Asia) - Estimation of Test Data Volume for Scan Architectures with Different Numbers of Input Channels

Tsai, Fong-Jyun, Ye, Chong-Siao, Huang, Yu, Lee, Kuen-Jong, Cheng, Wu-Tung, Reddy, Sudhakar M., Kassab, Mark, Rajski, Janusz, Zheng, Shi-Xuan

Year:

2020

File:

PDF, 450 KB

2020

11

Scan-Based Speed-Path Debug for a Microprocessor

Zeng, Jing, Guo, Ruifeng, Cheng, Wu-Tung, Mateja, Michael A., Wang, Jing

Journal:

IEEE Design & Test of Computers

Year:

2012

Language:

english

File:

PDF, 575 KB

english, 2012

12

X-Tolerant Compactor with On-Chip Registration and Signature-Based Diagnosis

Tyszer, J., Rajski, J., Mrugalski, G., Mukherjee, N., Kassab, M., Wu-Tung Cheng, Sharma, M., Liyang Lai

Journal:

IEEE Design & Test of Computers

Year:

2007

Language:

english

File:

PDF, 707 KB

english, 2007

13

Programmable Leakage Test and Binning for TSVs With Self-Timed Timing Control

Huang, Shi-Yu, Lin, Yu-Hsiang, Huang, Li-Ren, Tsai, Kun-Han, Cheng, Wu-Tung

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2013

Language:

english

File:

PDF, 9.02 MB

english, 2013

14

[IEEE Comput. Soc 13th Asian Test Symposium - Kenting, Taiwan (15-17 Nov. 2004)] 13th Asian Test Symposium - Compactor independent direct diagnosis

Wu-Tung Cheng,, Kun-Han Tsai,, Yu Huang,, Tamarapalli, N., Rajski, J.

Year:

2004

Language:

english

File:

PDF, 210 KB

english, 2004

15

[IEEE 22nd IEEE VLSI Test Symposium, 2004. - Napa Valley, CA, USA (25-29 April 2004)] 22nd IEEE VLSI Test Symposium, 2004. Proceedings. - Memory BIST using ESP

Xiaogang Du,, Reddy, S.M., Ross, D.E., Wu-Tung Cheng,, Rayhawk, J.

Year:

2004

Language:

english

File:

PDF, 1.29 MB

english, 2004

16

Pulse-Vanishing Test for Interposers Wires in 2.5-D IC

Huang, Shi-Yu, Lee, Jeo-Yen, Tsai, Kun-Han, Cheng, Wu-Tung

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2014

Language:

english

File:

PDF, 3.04 MB

english, 2014

17

[IEEE 2006 15th Asian Test Symposium - Fukuoka, Japan (2006.11.20-2006.11.20)] 2006 15th Asian Test Symposium - A Field Programmable Memory BIST Architecture Supporting Algorithms with Multiple Nested Loops

Du, Xiaogang, Mukherjee, Nilanjan, Hill, Chris, Cheng, Wu-tung, Reddy, Sudhakar

Year:

2006

Language:

english

File:

PDF, 252 KB

english, 2006

18

[IEEE 26th IEEE VLSI Test Symposium (vts 2008) - San Diego, CA, USA (2008.04.27-2008.05.1)] 26th IEEE VLSI Test Symposium (vts 2008) - Reducing Scan Shift Power at RTL

Alpaslan, Elif, Huang, Yu, Lin, Xijiang, Cheng, Wu-Tung, Dworak, Jennifer

Year:

2008

Language:

english

File:

PDF, 509 KB

english, 2008

19

[IEEE Comput. Soc . Design, Automation and Test in Europe Conference and Exhibition - Paris, France (16-20 Feb. 2004)] Proceedings. Design, Automation and Test in Europe Conference and Exhibition - Intermittent scan chain fault diagnosis based on signal probability analysis

Yu Huang,, Wu-Tung Cheng,, Cheng-Ju Hsieh,, Huan-Yung Tseng,, Alou Huang,, Yu-Ting Hung,

Year:

2004

Language:

english

File:

PDF, 382 KB

english, 2004

20

[IEEE 2016 International Conference on High Performance Computing & Simulation (HPCS) - Innsbruck, Austria (2016.7.18-2016.7.22)] 2016 International Conference on High Performance Computing & Simulation (HPCS) - A wide-range clock signal generation scheme for speed grading of a logic core

Huang, Shi-Yu, Huang, Tzu-Heng, Tsai, Kun-Han, Cheng, Wu-Tung

Year:

2016

File:

PDF, 376 KB

2016

21

On Reducing Scan Shift Activity at RTL

Alpaslan, E., Yu Huang, Xijiang Lin, Wu-Tung Cheng, Dworak, J.

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2010

Language:

english

File:

PDF, 4.94 MB

english, 2010

22

[IEEE 16th Asian Test Symposium (ATS 2007) - Beijing, China (2007.10.8-2007.10.11)] 16th Asian Test Symposium (ATS 2007) - A RTL Testability Analyzer Based on Logical Virtual Prototyping

Huang, Yu, Mukherjee, Nilanjan, Cheng, Wu-Tung, Aldrich, Greg

Year:

2007

Language:

english

File:

PDF, 335 KB

english, 2007

23

[IEEE 2010 IEEE International Test Conference (ITC) - Austin, TX, USA (2010.11.2-2010.11.4)] 2010 IEEE International Test Conference - Test cycle power optimization for scan-based designs

Tsai, Kun-Han, Huang, Yu, Cheng, Wu-Tung, Tai, Ting-Pu, Kifli, Augusli

Year:

2010

Language:

english

File:

PDF, 1.62 MB

english, 2010

24

Oscillation-Based Prebond TSV Test

Huang, Li-Ren, Huang, Shi-Yu, Sunter, Stephen, Tsai, Kun-Han, Cheng, Wu-Tung

Journal:

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems

Year:

2013

Language:

english

File:

PDF, 4.90 MB

english, 2013

25

[IEEE IEEE International Conference on Test, 2005. - Charlotte, NC, USA (Nov. 8, 2005)] IEEE International Conference on Test, 2005. - X-filter: filtering unknowns from compacted test responses

Sharma, M., Wu-Tung Cheng,

Year:

2005

Language:

english

File:

PDF, 242 KB

english, 2005

26

[IEEE 2013 22nd Asian Test Symposium (ATS) - Yilan County, Taiwan (2013.11.18-2013.11.21)] 2013 22nd Asian Test Symposium - Mid-bond Interposer Wire Test

Huang, Li-Ren, Huang, Shi-Yu, Tsai, Kun-Han, Cheng, Wu-Tung, Sunter, Stephen

Year:

2013

Language:

english

File:

PDF, 571 KB

english, 2013

27

[IEEE 16th Asian Test Symposium (ATS 2007) - Beijing, China (2007.10.8-2007.10.11)] 16th Asian Test Symposium (ATS 2007) - Programmable Scan-Based Logic Built-In Self Test

Lai, Liyang, Lai, Liyang, Cheng, Wu-Tung, Cheng, Wu-Tung, Rinderknecht, Thomas, Rinderknecht, Thomas

Year:

2007

Language:

english

File:

PDF, 293 KB

english, 2007

28

[IEEE 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - San Jose, CA, USA (2010.11.7-2010.11.11)] 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) - A scalable quantitative measure of IR-drop effects for scan pattern generation

Wu, M.-F., Tsai, Kun-Han, Cheng, Wu-Tung, Pan, H.-C., Huang, Jiun-Lang, Kifli, Augusli

Year:

2010

Language:

english

File:

PDF, 1.56 MB

english, 2010

29

[IEEE 2016 IEEE European Test Symposium (ETS) - Amsterdam, Netherlands (2016.5.23-2016.5.27)] 2016 21th IEEE European Test Symposium (ETS) - Testing of small delay faults in a clock network

Shao-Fu Yang,, Huang, Shi-Yu, Tsai, Kun-Han, Cheng, Wu-Tung

Year:

2016

Language:

english

File:

PDF, 1.22 MB

english, 2016

30

[IEEE 2019 IEEE European Test Symposium (ETS) - Baden-Baden, Germany (2019.5.27-2019.5.31)] 2019 IEEE European Test Symposium (ETS) - A supervised machine learning application in volume diagnosis

Tian, Yue, Veda, Gaurav, Cheng, Wu-Tung, Sharma, Manish, Tang, Huaxing, Bawaskar, Neerja, Reddy, Sudhakar M.

Year:

2019

Language:

english

File:

PDF, 815 KB

english, 2019

31

[IEEE Tenth Asian Test Symposium - Kyoto, Japan (19-21 Nov. 2001)] Proceedings 10th Asian Test Symposium - Resource allocation and test scheduling for concurrent test of core-based SOC design

Yu Huang,, Wu-Tung Cheng,, Chien-Chung Tsai,, Mukherjee, N., Samman, O., Zaidan, Y., Reddy, S.M.

Year:

2001

Language:

english

File:

PDF, 565 KB

english, 2001

32

[IEEE 2012 21st Asian Test Symposium (ATS) - Niigata, Japan (2012.11.19-2012.11.22)] 2012 IEEE 21st Asian Test Symposium - A Hybrid Flow for Memory Failure Bitmap Classification

Li, Jianbo, Huang, Yu, Cheng, Wu-Tung, Schuermyer, Chris, Xiang, Dong, Faehn, Eric, Farrugia, Ruth

Year:

2012

Language:

english

File:

PDF, 242 KB

english, 2012

33

[IEEE 2009 14th IEEE European Test Symposium (ETS) - Sevilla, Spain (2009.05.25-2009.05.29)] 2009 14th IEEE European Test Symposium - Speed-Path Debug Using At-Speed Scan Test Patterns

Guo, Ruifeng, Cheng, Wu-Tung, Tsai, Kun-Han

Year:

2009

Language:

english

File:

PDF, 184 KB

english, 2009

34

[IEEE 2012 IEEE International Test Conference (ITC) - Anaheim, CA, USA (2012.11.5-2012.11.8)] 2012 IEEE International Test Conference - Improved volume diagnosis throughput using dynamic design partitioning

Fan, Xiaoxin, Tang, Huaxing, Huang, Yu, Cheng, Wu-Tung, Reddy, Sudhakar M., Benware, Brady

Year:

2012

Language:

english

File:

PDF, 527 KB

english, 2012

35

[IEEE 2016 IEEE International Test Conference (ITC) - Fort Worth, TX, USA (2016.11.15-2016.11.17)] 2016 IEEE International Test Conference (ITC) - Online slack-time binning for IO-registered die-to-die interconnects

Zheng, Chih-Chieh, Huang, Shi-Yu, Lu, Shyue-Kung, Wang, Ting-Chi, Tsai, Kun-Han, Cheng, Wu-Tung

Year:

2016

Language:

english

File:

PDF, 575 KB

english, 2016

36

Autonomous Scan Patterns for Laser Voltage Imaging

Tyszer, Jerzy, Cheng, Wu-Tung, Milewski, Sylwester, Mrugalski, Grzegorz, Rajski, Janusz, Trawka, Maciej

Journal:

IEEE Transactions on Emerging Topics in Computing

Year:

2019

File:

PDF, 5.36 MB

2019

37

[IEEE 2020 IEEE European Test Symposium (ETS) - Tallinn, Estonia (2020.5.25-2020.5.29)] 2020 IEEE European Test Symposium (ETS) - Efficient Prognostication of Pattern Count with Different Input Compression Ratios

Tsai, Fong-Jyun, Ye, Chong-Siao, Huang, Yu, Lee, Kuen-Jong, Cheng, Wu-Tung, Reddy, Sudhakar M., Kassab, Mark, Rajski, Janusz

Year:

2020

File:

PDF, 277 KB

2020

38

[IEEE 2007 IEEE International Test Conference - Santa Clara, CA, USA (2007.10.21-2007.10.26)] 2007 IEEE International Test Conference - Signature based diagnosis for logic BIST

Wu-Tung Cheng,, Manish Sharma,, Rinderknecht, Thomas, Liyang Lai,, Hill, Chris

Year:

2007

Language:

english

File:

PDF, 250 KB

english, 2007

39

Delay Characterization and Testing of Arbitrary Multiple-Pin Interconnects

Huang, Shi-Yu, Tsai, Meng-Ting, Tsai, Kun-Han, Cheng, Wu-Tung

Journal:

IEEE Design and Test

Year:

2016

Language:

english

File:

PDF, 697 KB

english, 2016

40

[IEEE 2015 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA) - Hsinchu, Taiwan (2015.4.27-2015.4.29)] 2015 International Symposium on VLSI Technology, Systems and Applications - Identify problematic layout patterns through volume diagnosis

Year:

2015

File:

PDF, 40 KB

2015

41

[IEEE 16th Asian Test Symposium (ATS 2007) - Beijing, China (2007.10.8-2007.10.11)] 16th Asian Test Symposium (ATS 2007) - Fault Dictionary Based Scan Chain Failure Diagnosis

Guo, Ruifeng, Huang, Yu, Cheng, Wu-Tung

Year:

2007

Language:

english

File:

PDF, 202 KB

english, 2007

42

[IEEE 2019 30th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) - Saratoga Springs, NY, USA (2019.5.6-2019.5.9)] 2019 30th Annual SEMI Advanced Semiconductor Manufacturing Conference (ASMC) - Yield Learning for Complex FinFET Defect Mechanisms Based on Volume Scan Diagnosis Results

Tang, Huaxing, Sharma, Manish, Cheng, Wu-Tung, Veda, Gaurav, Gehringer, Douglas, Knowles, Matt, D'Souza, Jayant, Sekar, Kannan, Bawaskar, Neerja, Pan, Yan

Year:

2019

Language:

english

File:

PDF, 1.22 MB

english, 2019

43

[IEEE IEEE International Conference on Test, 2005. - Charlotte, NC, USA (Nov. 8, 2005)] IEEE International Conference on Test, 2005. - Full-speed field-programmable memory bist architecture

Xiaogang Du,, Mukherjee, N., Wu-Tung Cheng,, Reddy, S.M.

Year:

2005

Language:

english

File:

PDF, 326 KB

english, 2005

44

Diagnosis and Layout Aware (DLA) Scan Chain Stitching

Ye, Jing, Huang, Yu, Hu, Yu, Cheng, Wu-Tung, Guo, Ruifeng, Lai, Liyang, Tai, Ting-Pu, Li, Xiaowei, Changchien, Weipin, Lee, Daw-Ming, Chen, Ji-Jan, Eruvathi, Sandeep C., Kumara, Kartik K., Liu, Charle

Journal:

IEEE Transactions on Very Large Scale Integration (VLSI) Systems

Year:

2015

Language:

english

File:

PDF, 6.29 MB

english, 2015

45

[IEEE Comput. Soc 18th IEEE VLSI Test Symposium - Montreal, Que., Canada (30 April-4 May 2000)] Proceedings 18th IEEE VLSI Test Symposium - SIFAR: static test compaction for synchronous sequential circuits based on single fault restoration

Xijiang Lin,, Wu-Tung Cheng,, Pomeranz, I., Reddy, S.M.

Year:

2000

Language:

english

File:

PDF, 208 KB

english, 2000

46

[IEEE 2014 IEEE 23rd North Atlantic Test Workshop (NATW) - Johnson City, NY, USA (2014.5.14-2014.5.16)] 2014 IEEE 23rd North Atlantic Test Workshop - Test Compression Improvement with EDT Channel Sharing in SoC Designs

Huang, Yu, Kassab, Mark, Jahangiri, Jay, Rajski, Janusz, Cheng, Wu-Tung, Han, Dongkwan, Kim, Jihye, Chung, Kun Young

Year:

2014

Language:

english

File:

PDF, 658 KB

english, 2014

47

[IEEE 16th Asian Test Symposium (ATS 2007) - Beijing, China (2007.10.8-2007.10.11)] 16th Asian Test Symposium (ATS 2007) - Fault Dictionary Based Scan Chain Failure Diagnosis

Guo, Ruifeng, Huang, Yu, Cheng, Wu-Tung

Year:

2007

Language:

english

File:

PDF, 202 KB

english, 2007

48

[ECS ISTC/CSTIC 2009 (CISTC) - Shanghai, China (March 19 - March 20, 2009)] ECS Transactions - Yield Learning Through Scan Diagnosis

Huang, Yu, Cheng, Wu-Tung

Year:

2009

Language:

english

File:

PDF, 146 KB

english, 2009

49

[IEEE 2015 International Symposium on VLSI Design, Automation and Test (VLSI-DAT) - Hsinchu, Taiwan (2015.4.27-2015.4.29)] VLSI Design, Automation and Test(VLSI-DAT) - Identify problematic layout patterns through volume diagnosis

Year:

2015

Language:

english

File:

PDF, 480 KB

english, 2015

50

Survey of Scan Chain Diagnosis

Yu Huang, Ruifeng Guo, Wu-Tung Cheng, Li, J.C.-M.

Journal:

IEEE Design & Test of Computers

Year:

2008

Language:

english

File:

PDF, 502 KB

english, 2008

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